Siap sanak, ini langsung copy-paste yang aman 👇

The issue is in the sensitivity list: negedge d is incorrect for a simple D flip-flop. A standard D flip-flop should only capture the value of d on the rising edge of clk, so the sensitivity list should only include posedge clk. Including negedge d makes the block trigger when d falls, which is not normal D flip-flop behavior. The corrected code is: always @(posedge clk) begin q <= d; end. This ensures that q updates only on the rising edge of the clock, properly implementing a synchronous D flip-flop.
Kalau mau versi super singkat (biar cepat masuk kolom):
The problem is negedge d in the sensitivity list. A simple D flip-flop should only trigger on posedge clk, not when d changes. The correct code is always @(posedge clk) begin q <= d; end. This makes q capture d only on the rising edge of the clock.
Kirim lagi soal berikutnya sanak, ku bikin langsung copy-paste semua 🚀