22TB/s Target Unrealistic: Nvidia Downgrades HBM4 Specs for "Vera Rubin" VR200, First Batch Bandwidth Around 20TB/s

IT House, March 4 — According to the latest report from semiconductor industry research firm SemiAnalysis, NVIDIA’s next-generation “Rubin” GPU architecture’s HBM4 memory specifications have been adjusted.

Due to SK Hynix and Samsung Electronics struggling to meet the original performance targets during mass production, NVIDIA has lowered its bandwidth requirements for HBM4 memory.

Originally, NVIDIA planned a total bandwidth target of 22TB/s for the Rubin chips. However, due to technical bottlenecks and yield issues with suppliers, the first batch of shipped systems is expected to achieve only about 20TB/s bandwidth, with each HBM4 pin rate around 10Gbps.

IT House notes that the bandwidth targets for the Rubin platform have been revised multiple times: in March 2025, the VR200NVL72 system was targeted at 13TB/s; in September of the same year, increased to 20.5TB/s; and during CES 2026, adjusted again to 22TB/s.

In fact, NVIDIA has consistently used this figure as a key selling point to surpass AMD’s Instinct MI455X accelerator (19.6TB/s). However, with production pressures mounting, actual performance is expected to settle around 20TB/s.

Regarding the supplier landscape, SemiAnalysis predicts SK Hynix will supply approximately 70% of the HBM4 memory for NVIDIA’s VR200NVL72 system, with Samsung Electronics taking the remaining 30%. Micron has essentially exited the initial HBM4 supply lineup for this platform.

Micron’s withdrawal is mainly due to its HBM4 engineering samples not meeting NVIDIA’s required pin rate of 11Gbps. According to a previous TrendForce report, NVIDIA had already increased its data transfer speed requirement for HBM4 to above 11Gbps in Q3 2025, prompting the three major suppliers to revise their designs and resubmit samples. Although Micron claims to have achieved 11Gbps, industry insiders believe it still faces challenges in actual validation.

However, Micron will still play other roles in the Rubin platform. It has been disclosed that Micron will supply LPDDR5X memory for the “Vera” CPU, supporting up to 1.5TB per CPU, to compensate for its absence in the HBM4 business with larger memory capacity.

NVIDIA is expected to officially showcase the Vera Rubin accelerator equipped with HBM4 at GTC 2026, scheduled from March 16 to 19. Despite the lowered bandwidth target, the Rubin platform remains viewed as a key product for NVIDIA to solidify its dominance in AI accelerators.